System-Level Memory Management for Weakly Parallel Image Processing

Application studies in the areas of image and video processing systems indicate that between 50 and 80% of the area cost in (application-speci c) architectures for realtime multi-dimensional signal processing (RMSP) is due to memory units, i.e. single or multi-port RAMs, pointer-addressed memories, and register les. This is true for both single-processor and weakly parallel processor realizations. This paper has two main contributions. First, to reduce this dominant cost, we propose to address the systemlevel storage organization for the multi-dimensional (M-D) signals as a rst step in the overall methodology to map these applications, even before the parallelization and load balancing. Secondly, we will demonstrate the usefulness of this novel approach based on two realistic test-vehicles, namely a cavity detector for medical image processing and a quad-tree based image coding application. The novel design results for these relevant applications are useful as such.